On 31/10/22 18:16, Allen-KH Cheng wrote:
The number of bytes used by spi_nor_spimem_check_readop() may be
incorrect for the dummy cycles. Since nor->read_dummy is not initialized
before spi_nor_spimem_adjust_hwcaps().
We use both mode and wait state clock cycles instead of nor->read_dummy.
Fixes: 0e30f47232ab ("mtd: spi-nor: add support for DTR protocol")
Co-developed-by: Bayi Cheng <bayi.cheng@xxxxxxxxxxxx>
Signed-off-by: Bayi Cheng <bayi.cheng@xxxxxxxxxxxx>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx>
---
Tested-by: Dhruva Gole <d-gole@xxxxxx>
drivers/mtd/spi-nor/core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 6c921eb3fadb..8b9c318a0ad4 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -1914,7 +1914,8 @@ static int spi_nor_spimem_check_readop(struct spi_nor *nor,
spi_nor_spimem_setup_op(nor, &op, read->proto);
/* convert the dummy cycles to the number of bytes */
- op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
+ op.dummy.nbytes = (read->num_mode_clocks + read->num_wait_states) *
+ op.dummy.buswidth / 8;
if (spi_nor_protocol_is_dtr(nor->read_proto))
op.dummy.nbytes *= 2;
Tested on my AM625 SK EVM having spi nor flash and no obvious
regressions observed :)
--
Best regards,
Dhruva Gole
Texas Instruments Incorporated
