On Thu, 18 Aug 2022 04:00:59 +0300, Cristian Ciocaltea wrote: > The AMD SPI controller hardware seems to expect the FIFO buffer to be > fully setup with the details of all transfers in the SPI message before > it is able to start processing the data in a reliable way. > > Furthermore, it imposes a strict ordering restriction, in the sense that > all TX transfers must be handled prior any RX transfer. > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/1] spi: amd: Setup all xfers before opcode execution commit: 9d08f700ab78fd96cbe5922c261051743cb9c86e All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark