Commit 094d3b9 ("mtd: spi-nor: Add USE_FSR flag for n25q* entries") and following one 8f93826 ("mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag") enables SPINOR_OP_RDFSR opcode handling ability, however some controller drivers still cannot handle it properly in the micron_st_nor_ready() call what breaks some mtd callbacks with next error logs: mtdblock: erase of region [address1, size1] on "BIOS" failed mtdblock: erase of region [address2, size2] on "BIOS" failed Just skip subsequent processing of the SPINOR_OP_RDFSR opcode's results because of -ENOTSUPP return value of the micron_st_nor_read_fsr() if there is no proper handling of that opcode as it's been before commit 094d3b9 ("mtd: spi-nor: Add USE_FSR flag for n25q* entries") Signed-off-by: Oleksandr Ocheretnyi <oocheret@xxxxxxxxx> --- drivers/mtd/spi-nor/micron-st.c | 6 +++++- drivers/spi/spi-intel.c | 3 ++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index a96f74e0f568..507e675d81e0 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -399,8 +399,12 @@ static int micron_st_nor_ready(struct spi_nor *nor) return sr_ready; ret = micron_st_nor_read_fsr(nor, nor->bouncebuf); - if (ret) + if (ret < 0) { + /* Check if read FSR is supported. If not, skip it. */ + if (ret == -ENOTSUPP) + return sr_ready; return ret; + } if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) { if (nor->bouncebuf[0] & FSR_E_ERR) diff --git a/drivers/spi/spi-intel.c b/drivers/spi/spi-intel.c index 50f42983b950..f0313a718d1b 100644 --- a/drivers/spi/spi-intel.c +++ b/drivers/spi/spi-intel.c @@ -352,7 +352,8 @@ static int intel_spi_hw_cycle(struct intel_spi *ispi, u8 opcode, size_t len) val |= HSFSTS_CTL_FCYCLE_RDSR; break; default: - return -EINVAL; + dev_dbg(ispi->dev, "%#x not supported\n", opcode); + return -ENOTSUPP; } if (len > INTEL_SPI_FIFO_SZ) -- 2.28.0