Re: [PATCH] spi: cadence: Detect transmit FIFO depth

[Mark Brown <broonie@xxxxxxxxxx>]

On Fri, 27 May 2022 11:11:43 +0200, Lars-Peter Clausen wrote:
> The depth of the transmit FIFO for the Cadence SPI controller is currently
> hardcoded to 128. But the depth is a synthesis configuration parameter of
> the core and can vary between different SoCs.
> 
> If the configured FIFO size is less than 128 the driver will busy loop in
> the cdns_spi_fill_tx_fifo() function waiting for FIFO space to become
> available.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/1] spi: cadence: Detect transmit FIFO depth
      commit: 7b40322f7183a92c4303457528ae7cda571c60b9

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
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Thanks,
Mark