Hi linux-spi folks,
Upstream commit 98d948eb8331 ("spi: cadence-quadspi: fix write
completion support") introduced the "intel,socfpga-qspi" compatible
string and the new CQSPI_NO_SUPPORT_WR_COMPLETION quirk.
Changing the device tree node's "compatible" string from "cdns,qspi-nor"
to "intel,socfpga-qspi" sets CQSPI_NO_SUPPORT_WR_COMPLETION but no
longer sets CQSPI_DISABLE_DAC_MODE. I'm guessing that was unintentional
and that quirks should have both bits set.
"socfpga.dtsi" sets the size of the AHB resource to 0x1000, so direct
mode would only be used for the initial 4 KiB. "socfpga-arria10" and
"socfpga-stratix10.dtsi" set the size of the AHB resource to 0x100000,
so direct mode would be used for the initial 1 MiB (usually the whole
flash device).
Can anyone confirm whether DAC mode should be used or not on socfpga?
Thanks,
Ian
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