On Mon, 11 Apr 2022 21:45:27 +0300, Baruch Siach wrote: > From: Baruch Siach <baruch.siach@xxxxxxxxx> > > Some SPI devices latch MOSI bits on one clock phase, but produce valid > MISO bits on the other phase. Add SPI_RX_CPHA_FLIP mode to instruct the > controller driver to flip CPHA for Rx (MISO) only transfers. > > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/3] spi: add SPI_RX_CPHA_FLIP mode bit commit: b617be33502d2bfefffef71924c7a7ba50264ff6 [2/3] spi: spidev: add SPI_RX_CPHA_FLIP commit: 178d0cbbfe8ec652083058968c7a27485eaa33d2 [3/3] spi: spi-imx: add support for SPI_RX_CPHA_FLIP commit: 79422ed9bd7fbd79f84d8a5abb0094c16221f55b All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark