Re: [PATCH 1/4] spi: spi-mem: Allow specifying the byte order in DTR mode

[<Tudor.Ambarus@xxxxxxxxxxxxx>]

On 3/2/22 12:02, Pratyush Yadav wrote:
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> 
> Hi Tudor,

Hi, Pratyush,

> 
> I'm reviewing the code here. I still have not thought through the
> discussion about Kconfig option yet.
> 
> On 18/02/22 04:58PM, Tudor Ambarus wrote:
>> There are NOR flashes (Macronix) that swap the bytes on a 16-bit boundary
>> when configured in DTR mode. The byte order of 16-bit words is swapped
> 
> s/DTR mode/ Octal DTR mode/
> 
> I don't think this would apply to a 4D-4D-4D flash since it would only
> transmit one byte per clock cycle.