Re: [PATCH v2 10/10] ARM: dts: aspeed: Enable Dual SPI RX transfers
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- Subject: Re: [PATCH v2 10/10] ARM: dts: aspeed: Enable Dual SPI RX transfers
- From: Cédric Le Goater <clg@xxxxxxxx>
- Date: Thu, 3 Mar 2022 08:57:22 +0100
- Cc: <linux-spi@xxxxxxxxxxxxxxx>, linux-mtd <linux-mtd@xxxxxxxxxxxxxxxxxxx>, Mark Brown <broonie@xxxxxxxxxx>, Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx>, Pratyush Yadav <p.yadav@xxxxxx>, Miquel Raynal <miquel.raynal@xxxxxxxxxxx>, Richard Weinberger <richard@xxxxxx>, Vignesh Raghavendra <vigneshr@xxxxxx>, linux-aspeed <linux-aspeed@xxxxxxxxxxxxxxxx>, Andrew Jeffery <andrew@xxxxxxxx>, Chin-Ting Kuo <chin-ting_kuo@xxxxxxxxxxxxxx>, devicetree <devicetree@xxxxxxxxxxxxxxx>, Rob Herring <robh+dt@xxxxxxxxxx>, Linux ARM <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>, Linux Kernel Mailing List <linux-kernel@xxxxxxxxxxxxxxx>
- In-reply-to: <CACPK8Xd6VJLuWsvSjYrQ-y=yS+yR7vjdWECfsd2W9_J7e09K-A@mail.gmail.com>
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On 3/2/22 23:48, Joel Stanley wrote:
On Wed, 2 Mar 2022 at 22:45, Joel Stanley <joel@xxxxxxxxx> wrote:
On Wed, 2 Mar 2022 at 17:31, Cédric Le Goater <clg@xxxxxxxx> wrote:
All these controllers support at least Dual SPI. Update the DTs.
Reviewed-by: Joel Stanley <joel@xxxxxxxxx>
Signed-off-by: Cédric Le Goater <clg@xxxxxxxx>
Thanks. I'll apply this to the aspeed tree now.
Did you also have a patch to add a second flash chip to the AST2400 FMC?
That was a reference to the discussion on the openbmc list with Tao. I
was mistaken; the flash chips are there, but they lack the
spi-max-frequency property.
Yes.
I will include a patch in v3 for the second flash chip of the AST2400 FMC.
Thanks,
C.
---
arch/arm/boot/dts/aspeed-g4.dtsi | 6 ++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 7 +++++++
arch/arm/boot/dts/aspeed-g6.dtsi | 8 ++++++++
3 files changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 9ae67e83cf60..31e6569db97e 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -64,27 +64,32 @@ fmc: spi@1e620000 {
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
+ spi-rx-bus-width = <2>;
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@3 {
reg = < 3 >;
compatible = "jedec,spi-nor";
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@4 {
reg = < 4 >;
compatible = "jedec,spi-nor";
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
@@ -100,6 +105,7 @@ flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index c3e0a8e13c8a..29bf017899b6 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -66,18 +66,21 @@ flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
@@ -93,12 +96,14 @@ flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
@@ -114,12 +119,14 @@ flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 1ad05dde19d2..ce93c56a21a7 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -106,18 +106,21 @@ flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
@@ -133,12 +136,14 @@ flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
@@ -154,18 +159,21 @@ flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
status = "disabled";
};
};
--
2.34.1
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