Am Dienstag, dem 07.12.2021 um 12:57 +0000 schrieb Mark Brown: > * PGP Signed by an unknown key > > On Tue, Dec 07, 2021 at 11:41:14AM +0100, Alexander Stein wrote: > > > + if (!device_property_read_u32(&pdev->dev, "num-cs", &num_cs)) > > + controller->num_chipselect = num_cs; > > + else > > + controller->num_chipselect = 1; > > Do we need to use the num_cs property or can we just set num_chipselect > to whatever the maximum value that can be set is? I've never been 100% > clear on why num-cs is in the binding. I see two things which needs to be considered when setting num_chipselect: 1. The hardware limitation in the uC. The i.MX8XQP RM says: > The entire CS field is not fully supported in every LPSPI module > instance. Refer to the chip-specific information for LPSPI. This indicates there are some i.MX, not necessarily i.MX8 only, which have more than 2 hardware chip selects. This might be set depending on the compatible. 2. The hardware limitation on the SOM and/or mainboard. E.g. even if the uC supports 2 chip selects, only one may be available on the board connector. This is something which can only be set in the DT. This case is what this patch is about: Providing 2 hardware chip selects, as the default (if unset) is just one. Best regards, Alexander