Hello Clark Wang, The patch 4df2f5e1372e: "spi: imx: add a check for speed_hz before calculating the clock" from Apr 8, 2021, leads to the following Smatch static checker warning: drivers/spi/spi-imx.c:628 mx51_ecspi_prepare_transfer() error: uninitialized symbol 'clk'. drivers/spi/spi-imx.c 609 static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, 610 struct spi_device *spi) 611 { 612 u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); 613 u32 clk; ^^^^^^^^ This use to be "clk = t->speed_hz" 614 615 /* Clear BL field and set the right value */ 616 ctrl &= ~MX51_ECSPI_CTRL_BL_MASK; 617 if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) 618 ctrl |= (spi_imx->slave_burst * 8 - 1) 619 << MX51_ECSPI_CTRL_BL_OFFSET; 620 else 621 ctrl |= (spi_imx->bits_per_word - 1) 622 << MX51_ECSPI_CTRL_BL_OFFSET; 623 624 /* set clock speed */ 625 ctrl &= ~(0xf << MX51_ECSPI_CTRL_POSTDIV_OFFSET | 626 0xf << MX51_ECSPI_CTRL_PREDIV_OFFSET); 627 ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk); ^^^^ And then fixed here on the success path --> 628 spi_imx->spi_bus_clk = clk; Now if mx51_ecspi_clkdiv() fails it's uninitialized 629 630 /* 631 * ERR009165: work in XHC mode instead of SMC as PIO on the chips 632 * before i.mx6ul. 633 */ 634 if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) 635 ctrl |= MX51_ECSPI_CTRL_SMC; 636 else 637 ctrl &= ~MX51_ECSPI_CTRL_SMC; 638 639 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); 640 641 return 0; 642 } regards, dan carpenter