[PATCH 4/4] spi: dw: Add Synopsys Component version reading and parsing

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Each Synopsys DWC SSI controller is equipped with a Synopsys Component
version register, which encodes a version ID of an IP-core the
controller has been synthesized from. That can be useful in future for the
version-based conditional features implementation in the driver.

Note the component version is encoded as an ASCII string so we need to
convert it from the string to a normal unsigned integer to be easily used
then in the driver statements.

Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
---
 drivers/spi/spi-dw-core.c | 18 ++++++++++++++++++
 drivers/spi/spi-dw.h      |  1 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index b4cbcd38eaba..1766a29ca790 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -823,6 +823,24 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws)
 {
 	dw_spi_reset_chip(dws);
 
+	/*
+	 * Retrieve the Synopsys component version if it hasn't been specified
+	 * by the platform. Note the CoreKit version ID is encoded as a 4bytes
+	 * ASCII string enclosed with '*' symbol.
+	 */
+	if (!dws->ver) {
+		u32 comp;
+
+		comp = dw_readl(dws, DW_SPI_VERSION);
+		dws->ver = (DW_SPI_GET_BYTE(comp, 3) - '0') * 100;
+		dws->ver += (DW_SPI_GET_BYTE(comp, 2) - '0') * 10;
+		dws->ver += (DW_SPI_GET_BYTE(comp, 1) - '0');
+
+		dev_dbg(dev, "Synopsys DWC%sSSI v%u.%02u\n",
+			(dws->caps & DW_SPI_CAP_DWC_HSSI) ? " " : " APB ",
+			dws->ver / 100, dws->ver % 100);
+	}
+
 	/*
 	 * Try to detect the FIFO depth if not set by interface driver,
 	 * the depth could be from 2 to 256 from HW spec
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 634085eadad1..d06857d8d173 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -149,6 +149,7 @@ struct dw_spi {
 	u32			max_mem_freq;	/* max mem-ops bus freq */
 	u32			max_freq;	/* max bus freq supported */
 
+	u32			ver;		/* Synopsys component version */
 	u32			caps;		/* DW SPI capabilities */
 
 	u32			reg_io_width;	/* DR I/O width in bytes */
-- 
2.33.0




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