On 13/10/21 02:44PM, Mika Westerberg wrote: > The preferred way to implement SPI-NOR controller drivers is through SPI > subsubsystem utilizing the SPI MEM core functions. This converts the > Intel SPI flash controller driver over the SPI MEM by moving the driver > from SPI-NOR subsystem to SPI subsystem and in one go make it use the > SPI MEM functions. The driver name will be changed from intel-spi to > spi-intel to match the convention used in the SPI subsystem. > > Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> > --- > drivers/mtd/spi-nor/controllers/Kconfig | 36 -- > drivers/mtd/spi-nor/controllers/Makefile | 3 - > drivers/mtd/spi-nor/controllers/intel-spi.h | 21 -- > drivers/spi/Kconfig | 39 +++ > drivers/spi/Makefile | 3 + > .../intel-spi-pci.c => spi/spi-intel-pci.c} | 20 +- > .../spi-intel-platform.c} | 21 +- > .../intel-spi.c => spi/spi-intel.c} | 316 +++++++++++------- > drivers/spi/spi-intel.h | 19 ++ > include/linux/mfd/lpc_ich.h | 2 +- > .../x86/{intel-spi.h => spi-intel.h} | 6 +- > 11 files changed, 266 insertions(+), 220 deletions(-) > delete mode 100644 drivers/mtd/spi-nor/controllers/intel-spi.h > rename drivers/{mtd/spi-nor/controllers/intel-spi-pci.c => spi/spi-intel-pci.c} (86%) > rename drivers/{mtd/spi-nor/controllers/intel-spi-platform.c => spi/spi-intel-platform.c} (65%) > rename drivers/{mtd/spi-nor/controllers/intel-spi.c => spi/spi-intel.c} (79%) > create mode 100644 drivers/spi/spi-intel.h > rename include/linux/platform_data/x86/{intel-spi.h => spi-intel.h} (89%) > [...] > +static bool intel_spi_supports_mem_op(struct spi_mem *mem, > + const struct spi_mem_op *op) > +{ > + struct intel_spi *ispi = spi_master_get_devdata(mem->spi->master); > + > + if (op->cmd.dtr) > + return false; > + > + /* > + * The Intel controller supports widths up to 4 but it handles > + * them automatically and does not expose them to software. Here > + * we accept anything up to 4. > + */ > + if (op->cmd.buswidth > 4 || > + (op->addr.nbytes && op->addr.buswidth > 4) || > + (op->dummy.nbytes && op->dummy.buswidth > 4)) Also need to check data buswidth here? Other than this, Acked-by: Pratyush Yadav <p.yadav@xxxxxx> > + return false; > + > + if (ispi->swseq_reg && ispi->locked) { > + int i; > + > + /* Check if it is in the locked opcodes list */ > + for (i = 0; i < ARRAY_SIZE(ispi->opcodes); i++) { > + if (ispi->opcodes[i] == op->cmd.opcode) > + goto check_opcode; > } > > - return 0; > + return false; > } > > - /* Not needed with HW sequencer erase, make sure it is cleared */ > - ispi->atomic_preopcode = 0; > +check_opcode: > + switch (op->cmd.opcode) { > + case SPINOR_OP_RDID: > + case SPINOR_OP_RDSR: > + case SPINOR_OP_WRSR: > + return true; > > - while (len > 0) { > - writel(offs, ispi->base + FADDR); > + case SPINOR_OP_READ: > + case SPINOR_OP_READ_FAST: > + case SPINOR_OP_READ_4B: > + case SPINOR_OP_READ_FAST_4B: > + return true; > > - val = readl(ispi->base + HSFSTS_CTL); > - val &= ~(HSFSTS_CTL_FDBC_MASK | HSFSTS_CTL_FCYCLE_MASK); > - val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE; > - val |= cmd; > - val |= HSFSTS_CTL_FGO; > - writel(val, ispi->base + HSFSTS_CTL); > + case SPINOR_OP_PP: > + case SPINOR_OP_PP_4B: > + case SPINOR_OP_WREN: > + case SPINOR_OP_WRDI: > + return true; > > - ret = intel_spi_wait_hw_busy(ispi); > - if (ret) > - return ret; > + case SPINOR_OP_SE: > + case SPINOR_OP_SE_4B: > + return ispi->erase_64k; > > - status = readl(ispi->base + HSFSTS_CTL); > - if (status & HSFSTS_CTL_FCERR) > - return -EIO; > - else if (status & HSFSTS_CTL_AEL) > - return -EACCES; > + case SPINOR_OP_BE_4K: > + case SPINOR_OP_BE_4K_4B: > + return true; > + } > > - offs += erase_size; > - len -= erase_size; > + return false; > +} > + [...] -- Regards, Pratyush Yadav Texas Instruments Inc.