Re: [PATCH 1/3] spi: bcm-qspi: Add mspi spcr3 32/64-bits xfer mode

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Subject: Re: [PATCH 1/3] spi: bcm-qspi: Add mspi spcr3 32/64-bits xfer mode
From: Florian Fainelli <f.fainelli@xxxxxxxxx>
Date: Sun, 10 Oct 2021 19:54:05 -0700
Cc: bcm-kernel-feedback-list@xxxxxxxxxxxx, yendapally.reddy@xxxxxxxxxxxx, Kamal Dasu <kdasu@xxxxxxxxxxxx>
In-reply-to: <20211008203603.40915-2-kdasu.kdev@gmail.com>
References: <20211008203603.40915-1-kdasu.kdev@gmail.com> <20211008203603.40915-2-kdasu.kdev@gmail.com>
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On 10/8/2021 1:36 PM, Kamal Dasu wrote:

From: Kamal Dasu <kdasu@xxxxxxxxxxxx>

Adding 32-bits and 64-bits per transfer modes using the SPCR3
register settings provided in MSPI controller ver >= 1.5

Signed-off-by: Kamal Dasu <kdasu@xxxxxxxxxxxx>


Acked-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
--
Florian

References:
- [PATCH 0/3] spi-bcm-qspi spcr3 enahancements
  - From: Kamal Dasu
- [PATCH 1/3] spi: bcm-qspi: Add mspi spcr3 32/64-bits xfer mode
  - From: Kamal Dasu

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