Hi Apurva, Apurva Nandan <a-nandan@xxxxxx> wrote on Tue, 13 Jul 2021 13:05:33 +0000: > The SPI NAND core doesn't know how to switch the flash to Octal DTR > mode (i.e. which operations to perform). If the manufacturer hasn't > implemented the octal_dtr_enable() manufacturer_op, the SPI NAND core > wouldn't be able to switch to 8D-8D-8D mode and will also not be able > to run in 1S-1S-1S mode due to already selected 8D-8D-8D read/write > cache op_templates. > > So, avoid choosing a Octal DTR SPI op_template for read_cache, > write_cache and update_cache operations, if the manufacturer_op > octal_dtr_enable() is missing. After looking at your previous commit I don't see why this patch would be needed. octal_dtr_enable() only updates the mode when it succeeds so I don't think this patch is really needed. > > Signed-off-by: Apurva Nandan <a-nandan@xxxxxx> > --- > drivers/mtd/nand/spi/core.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c > index 19d8affac058..8711e887b795 100644 > --- a/drivers/mtd/nand/spi/core.c > +++ b/drivers/mtd/nand/spi/core.c > @@ -1028,6 +1028,8 @@ static int spinand_manufacturer_match(struct spinand_device *spinand, > if (id[0] != manufacturer->id) > continue; > > + spinand->manufacturer = manufacturer; > + > ret = spinand_match_and_init(spinand, > manufacturer->chips, > manufacturer->nchips, > @@ -1035,7 +1037,6 @@ static int spinand_manufacturer_match(struct spinand_device *spinand, > if (ret < 0) > continue; > > - spinand->manufacturer = manufacturer; > return 0; > } > return -ENOTSUPP; > @@ -1097,6 +1098,10 @@ spinand_select_op_variant(struct spinand_device *spinand, > unsigned int nbytes; > int ret; > > + if (spinand_op_is_octal_dtr(&op) && > + !spinand->manufacturer->ops->octal_dtr_enable) > + continue; > + > nbytes = nanddev_per_page_oobsize(nand) + > nanddev_page_size(nand); > Thanks, Miquèl