On Sat, 2021-07-17 at 13:46 +0000, David Laight wrote: > From: Eddie James > > Sent: 16 July 2021 14:39 > > > > The security restrictions on the FSI-attached SPI controllers have > > been applied universally to all controllers, so the controller can > > no > > longer transfer more than 8 bytes for one transfer. Refactor the > > driver > > to remove the looping and support for larger transfers, and remove > > the > > "restricted" compatible string, as all the controllers are now > > considered restricted. > > Aren't there significant performance (and device wear?) penalties > for doing short SPI eeprom writes? Probably so. However there is no choice in the matter, as the SPI controller can't process larger reads/writes. (I should note that the controller/driver CAN process up to 40 byte writes. However, the driver must report the minimum of read and write sizes in the max_transfer_size callback, so no client driver should request larger than the max read size - 8 bytes). Thanks, Eddie > > IIRC (and I'm not getting my serial busses confused) a write request > can request an aligned transfer of up to (typically) 32 bytes. > At which point you need to wait for the status to indicate > 'complete'. > > So restricting writes to 8 bytes increases block write times > by a factor of 4. > > Increasing the numbers of writes by a factor or 4 may also have > an effect on device wear - but that is more likely only affected > by erase cycles. > > David > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, > MK1 1PT, UK > Registration No: 1397386 (Wales) >