Besides the conversion work, also added the missing clock property in the original binding doc according to the current dts and driver implementation. Otherwise, make dtbs_check will fail. Also fixed example according to new jason schema. Cc: Ashish Kumar <ashish.kumar@xxxxxxx> Cc: Yogesh Gaur <yogeshgaur.83@xxxxxxxxx> Cc: Mark Brown <broonie@xxxxxxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: linux-spi@xxxxxxxxxxxxxxx Signed-off-by: Dong Aisheng <aisheng.dong@xxxxxxx> --- .../devicetree/bindings/spi/spi-nxp-fspi.txt | 44 ---------- .../devicetree/bindings/spi/spi-nxp-fspi.yaml | 87 +++++++++++++++++++ 2 files changed, 87 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt create mode 100644 Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt deleted file mode 100644 index 8f34a7c7d8b8..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt +++ /dev/null @@ -1,44 +0,0 @@ -* NXP Flex Serial Peripheral Interface (FSPI) - -Required properties: - - compatible : Should be "nxp,lx2160a-fspi" - "nxp,imx8qxp-fspi" - "nxp,imx8mm-fspi" - "nxp,imx8mp-fspi" - "nxp,imx8dxl-fspi" - - - reg : First contains the register location and length, - Second contains the memory mapping address and length - - reg-names : Should contain the resource reg names: - - fspi_base: configuration register address space - - fspi_mmap: memory mapped address space - - interrupts : Should contain the interrupt for the device - -Required SPI slave node properties: - - reg : There are two buses (A and B) with two chip selects each. - This encodes to which bus and CS the flash is connected: - - <0>: Bus A, CS 0 - - <1>: Bus A, CS 1 - - <2>: Bus B, CS 0 - - <3>: Bus B, CS 1 - -Example showing the usage of two SPI NOR slave devices on bus A: - -fspi0: spi@20c0000 { - compatible = "nxp,lx2160a-fspi"; - reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>; - reg-names = "fspi_base", "fspi_mmap"; - interrupts = <0 25 0x4>; /* Level high type */ - clocks = <&clockgen 4 3>, <&clockgen 4 3>; - clock-names = "fspi_en", "fspi"; - - mt35xu512aba0: flash@0 { - reg = <0>; - .... - }; - - mt35xu512aba1: flash@1 { - reg = <1>; - .... - }; -}; diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml new file mode 100644 index 000000000000..ca43583947ea --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP Flex Serial Peripheral Interface (FSPI) + +maintainers: + - Ashish Kumar <ashish.kumar@xxxxxxx> + +allOf: + - $ref: "/schemas/spi/spi-controller.yaml#" + +properties: + compatible: + enum: + - nxp,lx2160a-fspi + - nxp,imx8mm-fspi + - nxp,imx8mp-fspi + - nxp,imx8qxp-fspi + - nxp,imx8dxl-fspi + + reg: + items: + - description: register location and length + - description: memory mapping address and length + + reg-names: + items: + - const: fspi_base + - const: fspi_mmap + + interrupts: + maxItems: 1 + + clocks: + items: + - description: SPI Bus clock + - description: SPI Serial clock + + clock-names: + items: + - const: fspi_en + - const: fspi + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/fsl,qoriq-clockgen.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + fspi0: spi@20c0000 { + compatible = "nxp,lx2160a-fspi"; + reg = <0x0 0x20c0000 0x0 0x10000>, + <0x0 0x20000000 0x0 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + interrupts = <0 25 0x4>; /* Level high type */ + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + #address-cells = <1>; + #size-cells = <0>; + + mt35xu512aba0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + }; + + mt35xu512aba1: flash@1 { + compatible = "jedec,spi-nor"; + reg = <1>; + }; + }; + }; -- 2.25.1