Hi Mark, Mark Brown <broonie@xxxxxxxxxx> wrote on Wed, 19 May 2021 20:18:36 +0100: > On Tue, May 18, 2021 at 06:27:51PM +0200, patrice.chotard@xxxxxxxxxxx wrote: > > From: Patrice Chotard <patrice.chotard@xxxxxxxxxxx> > > > > This series adds support for the spi_mem_poll_status() spinand > > interface. > > Some QSPI controllers allows to poll automatically memory > > status during operations (erase, read or write). This allows to > > offload the CPU for this task. > > STM32 QSPI is supporting this feature, driver update are also > > part of this series. > > The SPI bits look good to me - should we merge via MTD or SPI? I don't expect any conflicts with the current changes in MTD, I just acked the SPI-NAND patch, you may take it through SPI. Thanks, Miquèl