On Thu, Mar 04, 2021 at 06:47:52PM +0800, Jay Fang wrote: > drivers/spi/spi-cadence-quadspi.c:267:18: warning: Shifting signed 32-bit > value by 31 bits is undefined behaviour [shiftTooManyBitsSigned] > return reg & (1 << CQSPI_REG_CONFIG_IDLE_LSB); > ^ > > Reported-by: kernel test robot <lkp@xxxxxxxxx> > Reported-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx> > Signed-off-by: Jay Fang <f.fangjian@xxxxxxxxxx> > --- > drivers/spi/spi-cadence-quadspi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c > index 442cc7c..9a2798a5 100644 > --- a/drivers/spi/spi-cadence-quadspi.c > +++ b/drivers/spi/spi-cadence-quadspi.c > @@ -264,7 +264,7 @@ static bool cqspi_is_idle(struct cqspi_st *cqspi) > { > u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); > > - return reg & (1 << CQSPI_REG_CONFIG_IDLE_LSB); > + return reg & (1UL << CQSPI_REG_CONFIG_IDLE_LSB); This is always going to be false because reg is a u32. regards, dan carpenter