Le 13/01/2021 à 13:33, Mark Brown a écrit :
On Wed, Jan 13, 2021 at 09:49:12AM +0100, Christophe Leroy wrote:
With commit 766c6b63aa04 ("spi: fix client driver breakages when using GPIO
descriptors") reverted, it is back to work:
...
What shall I do ?
I would guess that there's an error with the chip select polarity
configuration on your system that just happened to work previously, I'd
suggest fixing this in the board configuration to bring it in line with
everything else.
Not that easy.
Today I have in the DTS the CS GPIOs declared as ACTIVE_LOW.
If I declare them as ACTIVE_HIGH instead, then I also have to set spi-cs-high property, otherwise
of_gpio_flags_quirks() is not happy and forces the GPIO ACTIVE LOW.
When I set spi-cs-high property, it sets the SPI_CS_HIGH bit in spi->mode.
In fsl_spi_chipselect(), we have
bool pol = spi->mode & SPI_CS_HIGH
Then
pdata->cs_control(spi, pol);
So changing the board config is compensated by the above, and at the end it still doesn't work.
Whereas reverting the above mentionned commit sets back SPI_CS_HIGH into spi->mode without changing
the ACTIVE level of the GPIO, resulting in the correct polarity.
So, I'm a bit lost, where is the problem exactly ?
Thanks
Christophe
