On Tue, Dec 8, 2020 at 3:06 PM Yash Shah <yash.shah@xxxxxxxxxx> wrote:
>
> Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
> cores ("harts") that are present on FU740-C000 SoC.
>
> Signed-off-by: Yash Shah <yash.shah@xxxxxxxxxx>
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
Reviewed-by: Bin Meng <bin.meng@xxxxxxxxxxxxx>
Re: [PATCH v2 1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
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- Subject: Re: [PATCH v2 1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
- From: Bin Meng <bmeng.cn@xxxxxxxxx>
- Date: Thu, 10 Dec 2020 21:34:37 +0800
- Cc: linux-spi@xxxxxxxxxxxxxxx, linux-serial@xxxxxxxxxxxxxxx, linux-pwm@xxxxxxxxxxxxxxx, linux-i2c@xxxxxxxxxxxxxxx, linux-kernel <linux-kernel@xxxxxxxxxxxxxxx>, linux-riscv <linux-riscv@xxxxxxxxxxxxxxxxxxx>, devicetree <devicetree@xxxxxxxxxxxxxxx>, "open list:GPIO SUBSYSTEM" <linux-gpio@xxxxxxxxxxxxxxx>, broonie@xxxxxxxxxx, Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>, Albert Ou <aou@xxxxxxxxxxxxxxxxx>, lee.jones@xxxxxxxxxx, u.kleine-koenig@xxxxxxxxxxxxxx, Thierry Reding <thierry.reding@xxxxxxxxx>, andrew@xxxxxxx, Peter Korsgaard <peter@xxxxxxxxxxxxx>, Paul Walmsley <paul.walmsley@xxxxxxxxxx>, Palmer Dabbelt <palmer@xxxxxxxxxxx>, Rob Herring <robh+dt@xxxxxxxxxx>, Bartosz Golaszewski <bgolaszewski@xxxxxxxxxxxx>, Linus Walleij <linus.walleij@xxxxxxxxxx>
- In-reply-to: <1607403341-57214-2-git-send-email-yash.shah@sifive.com>
- References: <1607403341-57214-1-git-send-email-yash.shah@sifive.com> <1607403341-57214-2-git-send-email-yash.shah@sifive.com>
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