On Fri, May 29, 2020 at 11:49:12AM +0300, Sergei Shtylyov wrote: > Hello! > > On 29.05.2020 6:58, Serge Semin wrote: > > > Seeing DW APB SSI controller doesn't support setting the exactly > > requested SPI bus frequency, but only a rounded frequency determined > > by means of the odd-numbered half-worded reference clock divider, > > it would be good tune the SPI core up and initialize the current > ^ to? Thanks! I'll fix it in the next patchset version. -Sergey > > > transfer effective_speed_hz. By doing so the core will be able to > > execute the xfer-related delays with better accuracy. > > > > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > > Cc: Georgy Vlasov <Georgy.Vlasov@xxxxxxxxxxxxxxxxxxxx> > > Cc: Ramil Zaripov <Ramil.Zaripov@xxxxxxxxxxxxxxxxxxxx> > > Cc: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> > > Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> > > Cc: Arnd Bergmann <arnd@xxxxxxxx> > > Cc: Feng Tang <feng.tang@xxxxxxxxx> > > Cc: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> > > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > > Cc: linux-mips@xxxxxxxxxxxxxxx > > Cc: devicetree@xxxxxxxxxxxxxxx > [...] > > MBR, Sergei