It's better to understand what bits are set for DMA and for IRQ handling in mid_spi_dma_setup() if they are grouped accordingly. Thus, refactor mid_spi_dma_setup() to separate DMA and IRQ configuration. Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> --- drivers/spi/spi-dw-mid.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 0fd7543dc91a..20c07f7760ef 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -245,17 +245,17 @@ static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer) dw_writel(dws, DW_SPI_DMARDLR, 0xf); dw_writel(dws, DW_SPI_DMATDLR, 0x10); - if (xfer->tx_buf) { + if (xfer->tx_buf) dma_ctrl |= SPI_DMA_TDMAE; - imr |= SPI_INT_TXOI; - } - if (xfer->rx_buf) { + if (xfer->rx_buf) dma_ctrl |= SPI_DMA_RDMAE; - imr |= SPI_INT_RXUI | SPI_INT_RXOI; - } dw_writel(dws, DW_SPI_DMACR, dma_ctrl); /* Set the interrupt mask */ + if (xfer->tx_buf) + imr |= SPI_INT_TXOI; + if (xfer->rx_buf) + imr |= SPI_INT_RXUI | SPI_INT_RXOI; spi_umask_intr(dws, imr); dws->transfer_handler = dma_transfer; -- 2.26.2