Re: [PATCH v4 00/16] spi: dw: Add generic DW DMA controller support

[Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>]

On Fri, May 22, 2020 at 02:22:00PM +0300, Andy Shevchenko wrote:
> On Fri, May 22, 2020 at 03:07:49AM +0300, Serge Semin wrote:
> > Baikal-T1 SoC provides a DW DMA controller to perform low-speed peripherals
> > Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
> > APB SSI devices embedded into the SoC. Currently the DMA-based transfers
> > are supported by the DW APB SPI driver only as a middle layer code for
> > Intel MID/Elkhart PCI devices. Seeing the same code can be used for normal
> > platform DMAC device we introduced a set of patches to fix it within this
> > series.
> > 
> > First of all we need to add the Tx and Rx DMA channels support into the DW
> > APB SSI binding. Then there are several fixes and cleanups provided as a
> > initial preparation for the Generic DMA support integration: add Tx/Rx
> > finish wait methods, clear DMAC register when done or stopped, Fix native
> > CS being unset, enable interrupts in accordance with DMA xfer mode,
> > discard static DW DMA slave structures, discard unused void priv pointer
> > and dma_width member of the dw_spi structure, provide the DMA Tx/Rx burst
> > length parametrisation and make sure it's optionally set in accordance
> > with the DMA max-burst capability.
> > 
> > In order to have the DW APB SSI MMIO driver working with DMA we need to
> > initialize the paddr field with the physical base address of the DW APB SSI
> > registers space. Then we unpin the Intel MID specific code from the
> > generic DMA one and placed it into the spi-dw-pci.c driver, which is a
> > better place for it anyway. After that the naming cleanups are performed
> > since the code is going to be used for a generic DMAC device. Finally the
> > Generic DMA initialization can be added to the generic version of the
> > DW APB SSI IP.
> > 
> > Last but not least we traditionally convert the legacy plain text-based
> > dt-binding file with yaml-based one and as a cherry on a cake replace
> > the manually written DebugFS registers read method with a ready-to-use
> > for the same purpose regset32 DebugFS interface usage.
> > 
> > This patchset is rebased and tested on the spi/for-next (5.7-rc5):
> > base-commit: fe9fce6b2cf3 ("Merge remote-tracking branch 'spi/for-5.8' into spi-next")
> 
> I have got two bounces because of enormous Cc list in your patches.
> I highly recommend to reconsider your approach how you derive Cc lists.

And a hint for huge amount addresses @baikalelectronics.ru. Setup mailing list
there and subscribe people there, no need to show this all here.

-- 
With Best Regards,
Andy Shevchenko