On 2020/4/25 2:43, Pratyush Yadav wrote: > JESD216D.01 says that when the address width can be 3 or 4, it defaults > to 3 and enters 4-byte mode when given the appropriate command. So, when > we see a configurable width, default to 3 and let flash that default to > 4 change it in a post-bfpt fixup. > > This fixes SMPT parsing for flashes with configurable address width. If > the SMPT descriptor advertises variable address width, we use > nor->addr_width as the address width. But since it was not set to any > value from the SFDP table, the read command uses an address width of 0, > resulting in an incorrect read being issued. > > Signed-off-by: Pratyush Yadav <p.yadav@xxxxxx> > --- > drivers/mtd/spi-nor/sfdp.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c > index f917631c8110..5cecc4ba2141 100644 > --- a/drivers/mtd/spi-nor/sfdp.c > +++ b/drivers/mtd/spi-nor/sfdp.c > @@ -460,6 +460,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, > /* Number of address bytes. */ > switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) { > case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY: > + case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4: > nor->addr_width = 3; > break; Should we also assign address width to 3 in default condition. At least we should not leave it uninitialized here. Regards, Yicong >