On 31.01.2020 10:34, Andrij Abyzov wrote: > Heiner, > > I'm having a strange issue with the spi-fsl-espi driver when updating the firmware on Lattice MachXO2 FPGA. > It worked fine with the version 4.9, however one of the subsequent changes has led to the issue, that the read result is shifted right by 1 bit. > I understand this could be something due to polarity, phase or frequency, but it did work fine with 4.9 and before. > Now I'm trying to localize the issue by bisection, but that's a lengthy process and I thought that maybe you could have some insights. > I'm not the maintainer of this driver, so better set the linux-spi list on cc. Which device tree config is used? Or do you set a specific mode manually? > Best regards, > Andrij Abyzov Heiner