On broadwell machines it has been observed that the registers do not maintain their state through a suspend resume cycle. This is given that after a suspend resume cycle the SW CS bit is no longer set. This can break reads as CS will now be asserted between transmissions in messages and therefore reset the slave device unintentionally. Signed-off-by: Curtis Malainey <cujomalainey@xxxxxxxxxxxx> Cc: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx> --- drivers/spi/spi-pxa2xx.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index fc7ab4b268802..3f313a9755640 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1913,6 +1913,9 @@ static int pxa2xx_spi_resume(struct device *dev) return status; } + if (is_lpss_ssp(drv_data)) + lpss_ssp_setup(drv_data); + /* Start the queue running */ return spi_controller_resume(drv_data->controller); } -- 2.23.0.rc1.153.gdeed80330f-goog