On Sun, Aug 11, 2019 at 09:45:09PM +0200, Stefan Wahren wrote: > Am 03.08.19 um 12:10 schrieb Lukas Wunner: > > Commit 3bd7f6589f67 ("spi: bcm2835: Overcome sglist entry length > > limitation") amended the BCM2835 SPI driver with support for DMA > > transfers whose buffers are not aligned to 4 bytes and require more than > > one sglist entry. > > > > When testing this feature with upcoming commits to speed up TX-only and > > RX-only transfers, I noticed that SPI transmission sometimes breaks. > > A function introduced by the commit, bcm2835_spi_transfer_prologue(), > > performs one or two PIO transmissions as a prologue to the actual DMA > > transmission. It turns out that the breakage goes away if the DONE bit > > in the CS register is set when ending such a PIO transmission. > > > > The DONE bit signifies emptiness of the TX FIFO. According to the spec, > > the bit is of type RO, so writing it should never have any effect. > > Perhaps the spec is wrong and the bit is actually of type RW1C. > > E.g. the I2C controller on the BCM2835 does have an RW1C DONE bit which > > needs to be cleared by the driver. Another, possibly more likely > > explanation is that it's a hardware erratum since the issue does not > > occur consistently. > > > > Either way, amend bcm2835_spi_transfer_prologue() to always write the > > DONE bit. > > > > Usually a transmission is ended by bcm2835_spi_reset_hw(). If the > > transmission was successful, the TX FIFO is empty and thus the DONE bit > > is set when bcm2835_spi_reset_hw() reads the CS register. The bit is > > then written back to the register, so we happen to do the right thing. > > > > However if DONE is not set, e.g. because transmission is aborted with > > a non-empty TX FIFO, the bit won't be written by bcm2835_spi_reset_hw() > > and it seems possible that transmission might subsequently break. To be > > on the safe side, likewise amend bcm2835_spi_reset_hw() to always write > > the bit. > > has the issue already reported to Raspberry Pi Trading? You mean to fix such errata in future revisions? I wouldn't know who to report this to, Roger Thornton or James Adams perhaps? I'm not sure if the SPI controller isn't just an IP block licensed from a third party, that might make it difficult to get errata fixed. Thanks, Lukas