Re: [RFC v1 0/3] *spi-mem: adding setup and callback function

[Vignesh Raghavendra <vigneshr@xxxxxx>]

Hi,

On 31/07/19 1:49 PM, Tomer Maimon wrote:
> Hi Vignesh,
> 
> Does your new merge version will support direct spi-mem API?
> 


No, I don't have a driver to test out dirmap APIs. So, that would need
to be added separately on top.

I have posted next version of my series here (expect more revisions):
https://patchwork.ozlabs.org/cover/1140269/

Feel free to test and rebase dirmap API addition on top of it.

Regards
Vignesh


> Thanks,
> 
> Tomer
> 
> On Tue, 30 Jul 2019 at 21:04, Boris Brezillon
> <boris.brezillon@xxxxxxxxxxxxx <mailto:boris.brezillon@xxxxxxxxxxxxx>>
> wrote:
> 
>     On Tue, 30 Jul 2019 23:18:25 +0530
>     Vignesh Raghavendra <vigneshr@xxxxxx <mailto:vigneshr@xxxxxx>> wrote:
> 
>     > On 30-Jul-19 12:24 PM, Boris Brezillon wrote:
>     > > Trimmed the recipient list a bit and used Frieder's new address.
>     > > +Sergey
>     > >
>     > > On Mon, 29 Jul 2019 23:55:05 +0300
>     > > Tomer Maimon <tmaimon77@xxxxxxxxx <mailto:tmaimon77@xxxxxxxxx>>
>     wrote:
>     > >   
>     > >> Hi Boris,
>     > >>
>     > >> Thanks for the prompt reply,
>     > >>
>     > >>
>     > >>
>     > >> On Mon, 29 Jul 2019 at 18:29, Boris Brezillon
>     <boris.brezillon@xxxxxxxxxxxxx <mailto:boris.brezillon@xxxxxxxxxxxxx>>
>     > >> wrote:
>     > >> 
>     > >>> Hi Tomer,
>     > >>>
>     > >>> On Mon, 29 Jul 2019 17:25:01 +0300
>     > >>> Tomer Maimon <tmaimon77@xxxxxxxxx
>     <mailto:tmaimon77@xxxxxxxxx>> wrote:
>     > >>>   
>     > >>>> Lately we have working on Flash interface unit (FIU) SPI
>     driver that
>     > >>>> using spi-mem interface, Our FIU HW module support direct
>     Flash Rd//Wr.
>     > >>>>
>     > >>>> In our SOC (32 bit dual core ARM) we have 3 FIU's that using
>     memory   
>     > >>> mapping as follow:   
>     > >>>>
>     > >>>> FIU0 - have 2 chip select and each one have 128MB memory
>     mapping (total   
>     > >>> 256MB memory mapping)   
>     > >>>> FIU1 - have 4 chip select and each one have 128MB memory
>     mapping (total   
>     > >>> 512MB memory mapping)   
>     > >>>> FIU2 - have 4 chip select and each one have 16MB memory
>     mapping (total   
>     > >>> 32MB memory mapping)   
>     > >>>>
>     > >>>> Totally 800MB memory mapping.
>     > >>>>
>     > >>>> When the FIU driver probe it don't know the size of each
>     Flash that
>     > >>>> connected to the FIU, so the entire memory mapping is
>     allocated for each   
>     > >>> FIU   
>     > >>>> according the FIU device tree memory map parameters.   
>     > >>>
>     > >>> Do you need those mappings to be active to support simple reg
>     accesses?
>     > >>>   
>     > >>>> It means, if we enable all three FIU's the drivers will try
>     to allocate   
>     > >>> totally 800MB.   
>     > >>>>
>     > >>>> In 32bit system it is problematic because the kernel have
>     only 1GB
>     > >>>> of memory allocation so the vmalloc cannot take 800MB.
>     > >>>>
>     > >>>> When implementing the FIU driver in the mtd/spi-nor we
>     allocating memory   
>     > >>> address only   
>     > >>>> for detected Flash with exact size (usually we are not using
>     128MB   
>     > >>> Flash), and in that case usually we allocating much less
>     memory.   
>     > >>>>
>     > >>>> To solve this issue we needed to overcome two things:
>     > >>>>
>     > >>>> 1.    Get argument from the upper layer (spi-mem layer)
>     > >>>> 2.    Calling the get argument function after SPI_NOR_SCAN
>     function.   
>     > >>> (the MTD Flash size filled in  SPI_NOR_SCAN function)
>     > >>>
>     > >>> That's clearly breaking the layering we've tried to restore
>     with the
>     > >>> spi-nor/spi-mem split, and I don't see why this is needed
>     since we now
>     > >>> have a way to create direct mappings dynamically (with the
>     dirmap API).
>     > >>> Have you tried implementing the dirmap hooks in your driver?   
>     > >>
>     > >>
>     > >>  Sorry but I wasn't familiar with the direct mapping in the
>     spi-mem, it
>     > >> seems it needed to implemented in the m25p80 driver as well, am
>     I correct? 
>     > >
>     > > There's this patch [1] floating around. IIRC, Sergey was waiting for
>     > > the m25p80 -> spi-nor merge to send a v5. Vignesh, any updates
>     on that
>     > > one? If you don't have time to work on that, maybe Sergey could
>     send a
>     > > v5.
>     > >   
>     >
>     > I did send an updated series of merging m25p80 to spi-nor last
>     week and
>     > have received few comments. Will respin one more version this week
>     > (mostly by tomorrow).
> 
>     Okay, great!
> 

-- 
Regards
Vignesh