On Tue, 18 Jun 2019, Geert Uytterhoeven wrote: > Hi Lee, > > On Tue, Jun 18, 2019 at 11:57 AM Lee Jones <lee.jones@xxxxxxxxxx> wrote: > > On Tue, 18 Jun 2019, Geert Uytterhoeven wrote: > > > On Tue, Jun 18, 2019 at 11:20 AM Lee Jones <lee.jones@xxxxxxxxxx> wrote: > > > > So is an RPC-IF a real hardware device. Can you share the datasheet? > > > > > > Unfortunately the datasheet for the R-Car Gen3 and RZ/G2 SoCs is > > > not yet public. > > > > When will it be public? > > Dunno. RZ/G1 documentation became public a few months after the SoC > release. > > > Do you have access to it? > > Yes I do. Great. Maybe you can help Sergei with his 'undocumented bits' issue. > > > However, a very similar hardware block is present in the RZ/A2M SoC. > > > Please see Chapter 20 ("SPI Multi I/O Bus Controller") of the "RZ/A2M Group > > > User’s Manual: Hardware", which you can download from > > > https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html#documents > > > > "The SPI multi I/O bus controller enables the direct connection of > > serial flash, OctaFlashTM, XccelaTM flash, or HyperFlashTM memory > > devices to this LSI chip. > > > > This module allows the connected serial flash, OctaFlashTM, XccelaTM > > flash, or HyperFlashTM memory devices to be accessed by reading the > > external address space, or using Manual mode to transmit and receive > > data." > > > > Looks like a flash device to me. > > The external address space is a small window. > > > Can the SPI portion be used to connect generic SPI devices? > > I'll defer that to the people who worked on the driver... ... -- Lee Jones [李琼斯] Linaro Services Technical Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog