Re: [PATCH v12 3/3] dt-bindings: mfd: Document Renesas R-Car Gen3 RPC-IF MFD bindings

[Marek Vasut <marek.vasut@xxxxxxxxx>]

On 4/24/19 11:23 PM, Rob Herring wrote:
> On Wed, Apr 24, 2019 at 03:55:36PM +0800, Mason Yang wrote:
>> Document the bindings used by the Renesas R-Car Gen3 RPC-IF MFD.
>>
>> Signed-off-by: Mason Yang <masonccyang@xxxxxxxxxxx>
>> ---
>>  .../devicetree/bindings/mfd/mfd-renesas-rpc.txt    | 40 ++++++++++++++++++++++
>>  1 file changed, 40 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/mfd/mfd-renesas-rpc.txt
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/mfd-renesas-rpc.txt b/Documentation/devicetree/bindings/mfd/mfd-renesas-rpc.txt
>> new file mode 100644
>> index 0000000..668b822
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mfd/mfd-renesas-rpc.txt
>> @@ -0,0 +1,40 @@
>> +Renesas R-Car Gen3 RPC-IF MFD Device Tree Bindings
>> +--------------------------------------------------
> 
> Looks like a SPI flash controller from the example. What makes it an 
> MFD?

It supports both SPI NOR and HyperFlash (CFI-compliant flash with
different bus interface).

>> +
>> +Required properties:
>> +- compatible: should be an SoC-specific compatible value, followed by
>> +		"renesas,rcar-gen3-rpc" as a fallback.
>> +		supported SoC-specific values are:
>> +		"renesas,r8a77995-rpc"	(R-Car D3)
>> +- reg: should contain three register areas:
>> +	first for the base address of RPC-IF registers,
>> +	second for the direct mapping read mode and
>> +	third for the write buffer area.
>> +- reg-names: should contain "regs", "dirmap" and "wbuf"
>> +- clocks: should contain 1 entries for the module's clock
>> +- clock-names: should contain "rpc"
>> +- #address-cells: should be 1
>> +- #size-cells: should be 0
>> +
>> +Example:
>> +
>> +	rpc: rpc-if@ee200000 {
>> +		compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc";
>> +		reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>,
>> +		      <0 0xee208000 0 0x100>;
>> +		reg-names = "regs", "dirmap", "wbuf";
>> +		clocks = <&cpg CPG_MOD 917>;
>> +		clock-names = "rpc";
>> +		power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
>> +		resets = <&cpg 917>;
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		flash@0 {
>> +			compatible = "jedec,spi-nor";
>> +			reg = <0>;
>> +			spi-max-frequency = <40000000>;
>> +			spi-tx-bus-width = <1>;
>> +			spi-rx-bus-width = <1>;
>> +		};
>> +	};
>> -- 
>> 1.9.1
>>


-- 
Best regards,
Marek Vasut