Re: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller

[Schrempf Frieder <frieder.schrempf@xxxxxxxxxx>]

Hi Yogesh,

On 15.11.18 14:12, Boris Brezillon wrote:
> On Thu, 15 Nov 2018 11:43:05 +0000
> Schrempf Frieder <frieder.schrempf@xxxxxxxxxx> wrote:
> 
>> On 15.11.18 07:22, Yogesh Narayan Gaur wrote:
>>> Hi Frieder,
>>>
>>> With below patch on top of your v5, Read/Write/Erase on CS1 is working fine for me.
>>
>> Ok, are you sure, that AHB read is working too with this patch?
>> You are removing the memmap_phy offset from SFAR and the SFXXAD register
>> values.
>>
>> I can understand that selection of the CS and IP commands will work like
>> this, but I can't understand how AHB read should work without the base
>> address of the mapped memory.
>>
>> I'm afraid I still don't fully understand the background of these
>> things,
> 
> Same here. Yogesh, can you give us more detail on why you decided to
> drop the memmap_phy offset?

Your changes do not work on my setup (i.MX6UL). It looks like your 
hardware is different.

I found this patch for LS2080A: [1]. This would explain why you need to 
remove the offset to make it work.

To verify this, could you please test your setup with the current 
spi-nor driver (fsl_quadspi.c). If our assumptions are right, it should 
only work on CS0 and CS1 with [1] applied.

Thanks,
Frieder

[1]: http://patchwork.ozlabs.org/patch/660364/