Agree. I will create new patch which will just allow stalling by default. Vào Th 6, 28 thg 9, 2018 vào lúc 05:47 Mark Brown <broonie@xxxxxxxxxx> đã viết: > > On Wed, Sep 26, 2018 at 09:37:39PM +0700, Đặng Trần Hiếu wrote: > > > Default value of the register is to allow stalling (NOSTALL bit not > > set) but the spi-fsl-lpspi driver defaults to setting the NOSTALL bit > > in CFGR1. To me, it's more logical to leave the NOSTALL bit off with > > fsl,nostall binding to set the bit but as I am not sure if there are > > other drivers depending on the NOSTALL bit being set and not wanting > > to break other drivers hence introduction of this binding to keep the > > current default behavior. > > I can't see a situation where you'd actively want to report an error > rather than stall, stalling allows us to handle things gracefully by > restarting things. Even if it's a timeout situation it sounds like we > can unblock by reading/writing the stalled FIFO, and normally you'd be > resetting the entire IP anyway. I'd imagine the driver is this way > either through an oversight or because there's some bug on some silicon > which means that stalling breaks. > > Probably best to just always enable stalling unless I'm misreading > things, if it is silicon bugs on some versions then either a whitelist > or blacklist of SoCs to enable on (depending on how common the bug is) > would be the way forwards - that way SoCs where it works get the benefit.