On Thu, Sep 6, 2018 at 4:18 PM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote: > On Wed, Sep 5, 2018 at 9:30 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > On Tue, Sep 4, 2018 at 2:50 PM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote: > > The last two are even more interesting, as they use spi-gpio, so there > > are 3 flags > > impacting chip select polarity (gpio-sck cell 2, cs-gpios cell 2, > > cs-active-high). > > Currently I am dealing with the two latter, cs-gpios and > cs-active-high. > > Maybe I should look into the clock as well. Probably possible > to deal with in separate patches. Oh, haha I already fixed gpio-sck, see: commit c85823390215e52d68d3826df92a447ed31e5c80 "gpio: of: Support SPI nonstandard GPIO properties" commit 9b00bc7b901ff672a9252002d3810fdf9489bc64 "spi: spi-gpio: Rewrite to use GPIO descriptors" Yours, Linus Walleij