Re: [PATCH 2/4] spi: gpio: Fix reading for 3WIRE

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Tue, Sep 4, 2018 at 11:27 PM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:

> So the code can't even do what it is
> named after. At least no bitbang driver can, because the
> spi-bitbang-txrx.h have clauses like this:
>
> if ((flags & SPI_MASTER_NO_TX) == 0)
> (...)
> if ((flags & SPI_MASTER_NO_RX) == 0)
> (...)

I could really need some help I realize... the problem I
essentially face is the the hard inlines in spi-bitbang-txrx.h
bitbang_txrx_be_cpha[0|1]() need to take 3wire into account.

Except they shouldn't. Because those two inline functions
exist even though they just differ in one single instruction.

This is obviously a speed optimization, and it is also
clear that it is specifically tailored to sink constants and
run quick on 32bit CPUs by keeping data in registers.
Good.

So no matter if I pass the 3WIRE mode flag down to the
bitbang hard macros I just shouldn't augment them or
add parameters since it may affect timing/performance.

So remains to add two new permutations:
bitbang_txrx_be_3wire_cpha[0|1]() and double the
code in spi-bitbang-txrx.h. Not good for maintenance.

So damned if I do, damned if I don't.

But I guess I go for the latter approach?

Yours,
Linus Walleij