On Tue, Sep 4, 2018 at 10:47 PM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
Ah
> > > + if (spi->mode & SPI_CONTROLLER_HALF_DUPLEX) {
Hm that should have rather been flags... not spi->mode.
OK I think I have the patch in a better state now. Bear
with me.
Yours,
Linus Walleij
Re: [PATCH 1/4] spi: core: Allow both TX and RX transfers in 3WIRE
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- Subject: Re: [PATCH 1/4] spi: core: Allow both TX and RX transfers in 3WIRE
- From: Linus Walleij <linus.walleij@xxxxxxxxxx>
- Date: Tue, 4 Sep 2018 22:55:25 +0200
- Cc: linux-spi <linux-spi@xxxxxxxxxxxxxxx>, Andrzej Hajda <a.hajda@xxxxxxxxxxx>, Lorenzo Bianconi <lorenzo.bianconi@xxxxxxxxxx>, "open list:GPIO SUBSYSTEM" <linux-gpio@xxxxxxxxxxxxxxx>, Rob Herring <robh+dt@xxxxxxxxxx>
- In-reply-to: <CACRpkda7fMW3xzVevbd2W9G4zVs4dM5+dRZRHOA1Mg_bSiubyw@mail.gmail.com>
- References: <20180903215035.17265-1-linus.walleij@linaro.org> <20180903215035.17265-2-linus.walleij@linaro.org> <20180904172236.GL12993@sirena.org.uk> <CACRpkda7fMW3xzVevbd2W9G4zVs4dM5+dRZRHOA1Mg_bSiubyw@mail.gmail.com>
- References:
- [PATCH 0/4] SPI 3WIRE fixes and highz turnaround
- From: Linus Walleij
- [PATCH 1/4] spi: core: Allow both TX and RX transfers in 3WIRE
- From: Linus Walleij
- Re: [PATCH 1/4] spi: core: Allow both TX and RX transfers in 3WIRE
- From: Mark Brown
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- From: Linus Walleij
- [PATCH 0/4] SPI 3WIRE fixes and highz turnaround
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