Hi Lubo, On Tue, Aug 21, 2018 at 10:14 AM Lubomir Rintel <lkundrak@xxxxx> wrote: > I'm trying to port the OPLC XO 1.75 Embedded Controler (EC) driver to the SPI > slave framework. The EC is a SPI master that uses an extra pair of handshake > signals to determine when is it safe to transmit. The original driver [1] > included the SPI slave driver. > > [1] http://dev.laptop.org/git/olpc-kernel/tree/drivers/misc/olpc-ec-1-75.c?h=arm-3.0-wip > > To send the command to the EC, the protocol requires me to [2] signal to the > master that the tx FIFO is filled and it can start the transaction. The problem > is that I have no idea when that is. I'm wondering what my options are? The SPI slave output FIFO has been filled after the SPI slave controller's spi_controller.transfer_one() function has written all data to the controller's FIFO. Hence this is SPI controller specific. After filling the FIFO, the SPI slave controller should assert the ACK line. > [2] http://wiki.laptop.org/go/XO_1.75_HOST_to_EC_Protocol > > 1.) Add a ready() callback to the spi_message, that would fire after the tx > FIFO has been filled? > > 2.) Delay the ACK strobe a bit after spi_async() and just hope for the best > (Eek) > > 3.) Have the transfer with NULL rx_buf complete just after sending the data to > the controller, not waiting for actual transfer. And then strobe the ACK. > > 4.) Keep the SPI slave code in the EC driver. I suppose this wouldn't be > acceptable? > > Better ideas, opinions & advice appreciated! Is this on a DT-based platform? If yes, the GPIO (I assume it's a GPIO) used for the ACK signal will be provided by DT, and the SPI slave controller driver can assert it from its transfer_one() (or .transfer_one_message()) function after filling the FIFO. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds