[PATCH 1/2] dt-bindings: spi: add DT bindings for UniPhier SPI controller

[Keiji Hayashibara <hayashibara.keiji@xxxxxxxxxxxxx>]

From: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx>

Add DT bindings for SPI controller implemented in UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx>
Signed-off-by: Keiji Hayashibara <hayashibara.keiji@xxxxxxxxxxxxx>
---
 .../devicetree/bindings/spi/spi-uniphier.txt       | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-uniphier.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
new file mode 100644
index 0000000..9c8c4a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
@@ -0,0 +1,26 @@
+Socionext UniPhier SPI controller driver
+
+UniPhier SoCs have two types of SPI controllers; SCSSI supports a
+single channel, and MCSSI supports multiple channels.
+Both of them support the SPI master mode only.
+
+Required properties:
+ - compatible: should be
+	"socionext,uniphier-scssi" - for SCSSI device
+	"socionext,uniphier-mcssi" - for MCSSI device
+ - reg: address and length of the spi master registers
+ - #address-cells: must be <1>, see spi-bus.txt
+ - #size-cells: must be <0>, see spi-bus.txt
+ - clocks: A phandle to the clock for the device.
+ - resets: A phandle to the reset control for the device.
+
+Example:
+
+spi0: spi@54006000 {
+	compatible = "socionext,uniphier-scssi";
+	reg = <0x54006000 0x100>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clocks = <&peri_clk 11>;
+	resets = <&peri_rst 11>;
+};
-- 
2.7.4

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