On Tue, Jul 17, 2018 at 5:23 PM, Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx> wrote: > Because the SPI controller deasserts the chip select when the TX fifo is > empty (which may happen in the middle of a transfer), the CS should be > handled by linux. Unfortunately, some or all of the first four chip > selects are not muxable as GPIOs, depending on the SoC. > > There is a way to bitbang those pins by using the SPI boot controller so > use it to set the chip selects. > > At init time, it is also necessary to give control of the SPI interface to > the Designware IP. > + ret = dw_spi_mscc_init(pdev, dwsmmio); > + if (ret) > + goto out; > + { .compatible = "mscc,ocelot-spi", .data = dw_spi_mscc_init}, Looks like you were thinking about something like init_func = device_get_match_data(...); if (init_func) { ret = init_func(); if (ret) return ret; } ? -- With Best Regards, Andy Shevchenko -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html