On Tue, 2018-01-30 at 17:09 +0100, Jan Kundrát wrote: > On úterý 30. ledna 2018 16:54:09 CET, Mark Brown wrote: > > > What my patch does is simply picking the *first* unused CS and going with > > > that one because that looks like the easiest and also safest option. > > > > I would expect that you want to have this selected by the board designer > > (unless there's something convenient like a chip select present in the > > controller but not routed out of the IP you can guarantee will never be > > used). That will avoid issues if for example the DT is still not > > complete. > > That's the approach that I used in my first version of this patch [2], but > Geert suggested to follow some other SPI master's code and implement > autodiscovery. I don't really care. Which approach is better from your > point of view? Auto selecting the first unused is certainly nice for the DT constructor if it works. Also seems less fragile to me. But what about possible future support for dynamic creation of spi devices? There's already a patch for that out there and there is also DT fragment loading that could be merged. There might not be a device on HW CS0 when the driver loads, but then one is added later, which will be too late since the HW CS was chosen at driver probe time. That issue can probably be fixed by choosing the HW CS at spi transfer setup time. Another problem is that I don't believe there is any way for the master to know about what SPI slaves exist. In Jan's patch, the assumption is that a non-gpio CS is used. But this is not strictly correct, as is does not distinguish between an unused CS and in-use HW CS. Both those cases are "not gpio". But perhaps this is ok. I think the instructions to the DT author should be: If you will have GPIO chip selects, you must choose one HW CS line to be consumed and used by all GPIO CS based slave(s). Choose by placing the first GPIO CS at the position of the HW CS that should be consumed by that GPIO CS and any remaining ones. E.g., if you first to have three GPIO CS, and want them to consume HW CS 1, the first GPIO CS *must* be placed at CS 1, the remaining two may be at any subsequent CS. ��.n��������+%������w��{.n�����{����)��jg��������ݢj����G�������j:+v���w�m������w�������h�����٥