Re: [PATCH] spi: orion: Allow specifying which HW CS to use with a GPIO CS

[Andy Shevchenko <andy.shevchenko@xxxxxxxxx>]

On Tue, Jan 23, 2018 at 9:56 PM, Jan Kundrát <jan.kundrat@xxxxxxxxx> wrote:
>
> Commit b28b9149b37f added support for using an additional GPIO pin for
> Chip Select. According to that commit and to my understanding of a
> semi-public datahseet, it seems that the SPI hardware really insists on
> driving *some* HW CS signal whenever a SPI transaction is in progress.
>
> The old code effectively forced the HW CS pin to be CS0. That means that
> there could not be anything connected to the real CS0 signal when one
> uses a GPIO CS. That assumption does not hold on e.g. Solidrun Clearfog
> where some SOM models have a built-in SPI flash on SPI1, CS0.
Like Geert said I also highly recommend to use existing properties.

Better if you, in the meantime, can switch the driver to use GPIO
descriptors, while core still use legacy numbers.
It would make life easier in the future to switch SPI core to GPIO
descriptors completely.

-- 
With Best Regards,
Andy Shevchenko
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