On Wed, Jan 03, 2018 at 12:17:07AM +0100, Linus Walleij wrote: > I'd be surprised if either performance or object code size is affected > in a bad way though. I don't have any high-speed SPI devices I can test > really, and loopback would require some special hardware set-up I > don't have. You could just do something like spin on register reads on some device or something? Something like dumping a regmap via debugfs would do the trick probably. I too would be surprised if there were a substantial hit but it'd be good to check, while they've never been fast equally the slowness can make people more sensitive to performance (including impact on the rest of the system). One of the reasons people can end up with the GPIO controller is discovering some hardware bug in a hardware controller (like the issues a lot of the Freescale controllers have with trying to deassert chip select on every word transferred). > The last patch in the series remove remnants of an unused mechanism > that seemed to be for performance critical bitbanged SPI, that was never > put to use, I kind of assume noone is really doing performance critical > SPI over GPIO but I've been wrong before. It was never really possible to upstream users of that code, AFAICT it was always for custom out of tree builds.
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