On Mon, Jul 03, 2017 at 12:40:45AM +0200, Hauke Mehrtens wrote: > From: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> > > The reset controllers (on xRX200 and newer SoCs have two of them) are > provided by the RCU module. This was initially implemented as a simple > reset controller. However, the RCU module provides more functionality > (ethernet GPHYs, USB PHY, etc.), which makes it a MFD device. > The old reset controller driver implementation from > arch/mips/lantiq/xway/reset.c did not honor this fact. > > For some devices the request and the status bits are different. > > Signed-off-by: Hauke Mehrtens <hauke@xxxxxxxxxx> > Cc: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> > Reviewed-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx> > --- > .../devicetree/bindings/reset/lantiq,reset.txt | 29 +++ > drivers/reset/Kconfig | 6 + > drivers/reset/Makefile | 1 + > drivers/reset/reset-lantiq.c | 210 +++++++++++++++++++++ > 4 files changed, 246 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/lantiq,reset.txt > create mode 100644 drivers/reset/reset-lantiq.c > > diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.txt b/Documentation/devicetree/bindings/reset/lantiq,reset.txt > new file mode 100644 > index 000000000000..7737ed75f4c1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/lantiq,reset.txt > @@ -0,0 +1,29 @@ > +Lantiq XWAY SoC RCU reset controller binding > +============================================ > + > +This binding describes a reset-controller found on the RCU module on Lantiq > +XWAY SoCs. > + > +This driver has to be a sub node of the Lantiq RCU block. > + > +------------------------------------------------------------------------------- > +Required properties: > +- compatible : Should be one of > + "lantiq,danube-reset" > + "lantiq,xrx200-reset" > +- offset-set : Offset of the reset set register > +- offset-status : Offset of the reset status register With reg added (missing here) as shown in the RCU example you can remove these 2. > +- #reset-cells : Specifies the number of cells needed to encode the > + reset line, should be 2. > + The first cell takes the reset set bit and the > + second cell takes the status bit. > + > +------------------------------------------------------------------------------- > +Example for the reset-controllers on the xRX200 SoCs: > + reset0: reset-controller@0 { > + compatible = "lantiq,xrx200-reset"; > + > + offset-set = <0x10>; > + offset-status = <0x14>; > + #reset-cells = <2>; > + }; -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html