On Sat, Feb 11, 2017 at 12:54:47AM -0300, Vinicius Maciel wrote: > In order to work appropriately, the max11043 ADC chip and probably > others, needs SPI master samples the data at the correct edge. From > max11043 datasheet: "The data at DIN is latched on the rising edge > of SCLK". Same to DOUT. > > This patch add Master Sample Data Mode bit in normal sample mode. > It will affect only A20. This should be controlled by the SPI mode settings, different chips have different requirements. If the controller supports multiple modes then it should expose that and let the drivers and system integrations choose.
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