On Fri, Jan 27, 2017 at 12:52:15AM +0800, Daniel Kurtz wrote: > On Fri, Jan 27, 2017 at 12:35 AM, Dmitry Torokhov <dtor@xxxxxxxxxxxx> wrote: > > Nobody doing DMA likes unaligned buffers. In fact, memory used for DMA > > must be cacheline aligned, or you going to have trouble. What > > component supplies unaligned buffers to SPI core for transfers? > cros-ec-spi That needs fixing then - I keep thinking we should add a warning to the core for this, especially now we do DMA mapping in the core.
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