On Tue, Feb 09, 2016 at 03:49:24PM -0800, Eric Anholt wrote: > This patch surprised me. I would have thought that the solution was to > just write the updated CNTL bits for CPOL and wait a moment whenever it > changes. The CS only gets asserted later on when we get some data in > the TX FIFO, so I think you're just reducing the chance of losing the > race to get our inverted clock noticed by the device before the CS gets > asserted. We support (and generally want to use since hardware chip selects are often very limited in what they do) chip select on GPIO.
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