Re: [PATCH 4/4] spi: bcm2835aux: fix CPOL/CPHA setting

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Hi Stephan,

Am 09.02.2016 um 19:10 schrieb stephanolbrich@xxxxxx:
From: Stephan Olbrich <stephanolbrich@xxxxxx>

The auxiliary spi supports only CPHA=0 modes as the first bit is
always output to the pin before the first clock cycle. In CPHA=1
modes the first clock edge outputs the second bit hence the slave
can never read the first bit.

in case auxiliary spi isn't able to handle all modes shouldn't we report this to the upper layers?

Regards
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