Re: [PATCH 1/3] spi: core: add max_msg_size to spi_master

[Heiner Kallweit <hkallweit1@xxxxxxxxx>]

Am 22.11.2015 um 14:16 schrieb Mark Brown:
> On Sun, Nov 22, 2015 at 12:01:40AM +0100, Heiner Kallweit wrote:
>> Add a member to spi_master allowing to better handle
>> SPI chips with a message size HW limit.
> 
> How many devices have an actual message size limit (as opposed to a
> transfer size limit)?  It seems like the restrictions here are really on
> transfer sizes and that we probably want a second limit for devices that
> aren't able to deal with multiple transfers independently.
> 
To avoid misunderstandings:
For fsl-espi the length of a SPI transfer has to be programmed (max 64K)
and after this number of bytes has been transferred CS is deselected
internally. There's no way to control CS directly.
Do you consider this a message or transfer size limit?
To me this seems to be exactly what you describe as "devices that aren't
able to deal with multiple transfers independently".

> For slightly more complex things like this it probably also makes sense
> to use an accessor - I can see us wanting to combine restrictions from
> DMA engines into restrictions for the SPI controller for example.  That
> gives us a bit of insulation between the clients and the API.
> 
When you talk about accessors do you think of hooks in spi_master so that
each controller driver can provide its own implementation of e.g.
something like get_max_msg_size()?

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