Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx> writes: > Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for > configuring the chip select polarities. Touch only chip select SW mode and > state bits when enabling the software chip select control in order to not > clear any other bits in the register. > > Signed-off-by: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx> Acked-by: Robert Jarzmik <robert.jarzmik@xxxxxxx> Cheers. -- Robert -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html