Re: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Mon, Jul 27, 2015 at 01:55:56PM +0000, Ranjit Abhimanyu Waghmode wrote:

> > As I think you've been asked before please fix your mail client to word wrap
> > within paragraphs so your mails are more legible.

> Sorry about this, I did some changes but it's kind of broken. Will fix this.

Still not working...

> > I'm not entirely sure what you're asking here from the point of view of SPI, sorry
> > - what exactly are you requesting?  If you want to add support for new SPI bus
> > modes please go ahead and do that, you need to clearly document what any
> > new modes you're adding are so that other people can understand them.

> Ok, my description was too short to get it completely.

> For adding dual parallel mode support to current driver:
> Are following points enough? Or do you want to suggest something better on top of it?

> Driver:
> 1) Controller needs to know in which mode it is working.
> 2) As there are more than one chip selects, may need to add code for handling that as well.

That's probably about right.

Attachment: signature.asc
Description: Digital signature


[Index of Archives]     [Linux Kernel]     [Linux ARM (vger)]     [Linux ARM MSM]     [Linux Omap]     [Linux Arm]     [Linux Tegra]     [Fedora ARM]     [Linux for Samsung SOC]     [eCos]     [Linux Fastboot]     [Gcc Help]     [Git]     [DCCP]     [IETF Announce]     [Security]     [Linux MIPS]     [Yosemite Campsites]

  Powered by Linux