Re: [PATCH] spi: bcm2835: transform native-cs to gpio-cs on first spi_setup

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



> On 07.04.2015, at 05:01, Stephen Warren <swarren@xxxxxxxxxxxxx> wrote:
> I believe the bcm283x have 2 types of SPI controller. There is 1
> instance of the HW that this driver controls (SPI0), and that has CS0,
> CS1. There are two instances of a different SPI HW block (SPI1, SPI2),
> and those each have CS0, CS1, CS2. At least, that's my interpretation of
> the table that shows the pinctrl module's per-pin alternate function values.

Yes and no - SPI1 and SPI2 are a totally different beasts as these are 
"auxiliar devices" that have 2x2 word fifos, no DMA and minimal interrupt
support and use a distinct register layout compared to SPI0. 
See BCM2835 Arm Peripherials page 20-27 for details.

Essentially these are intended to get used for low speed devices or devices
that run short transfers (<4-8 bytes)

So these devices would need a totally separate SPI driver, which this driver
does not and can not handle...

> Should that be an error? Not being able to find the gpiochip implies the
> code can't manipulate the CS lines at all, I think?
Will add an dev_warn_once and contine without optimizations - the code 
still does check for the cs_gpio, so we would run without it? 
It could just be a rename of the pinctrl driver that would trigger this.

You want it as an error?

Martin

--
To unsubscribe from this list: send the line "unsubscribe linux-spi" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html




[Index of Archives]     [Linux Kernel]     [Linux ARM (vger)]     [Linux ARM MSM]     [Linux Omap]     [Linux Arm]     [Linux Tegra]     [Fedora ARM]     [Linux for Samsung SOC]     [eCos]     [Linux Fastboot]     [Gcc Help]     [Git]     [DCCP]     [IETF Announce]     [Security]     [Linux MIPS]     [Yosemite Campsites]

  Powered by Linux